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d a t a sh eet product specification supersedes data of 2001 jan 17 2002 nov 25 integrated circuits uda1361ts 96 khz sampling 24-bit stereo audio adc
2002 nov 25 2 nxp semiconductors product specification 96 khz sampling 24-bit stereo audio adc uda1361ts features general ? low power consumption ? 256, 384, 512 and 768f s system clock ? 2.4 to 3.6 v power supply ? supports sampling frequency of 5 to 110 khz ? small package size (ssop16) ? integrated high-pass filter to cancel dc offset ? power-down mode ? supports 2 v (rms) input signals ? easy application ? master or slave operation. multiple format output interface ? i 2 s-bus and msb-justified format compatible ? up to 24 significant bits serial output. advanced audio configuration ? stereo single-ended input configuration ? high linearity, dynamic range and low distortion. general description the uda1361ts is a single chip stereo analog-to-digital converter (adc) employing bitstream conversion techniques. the low power consumption and low voltage requirements make the device eminently suitable for use in low-voltage low-power portable digital audio equipment which incorporates recording functions. the uda1361ts supports the i 2 s-bus data format and the msb-justified data format wi th word lengths of up to 24 bits. ordering information type number package name description version uda1361ts ssop16 plastic shrink small outline package; 16 leads; body width 4.4 mm sot369-1
2002 nov 25 3 nxp semico nductors product specification 96 khz sampling 24-bit stereo audio adc uda1361ts quick reference data symbol parameter conditions min. typ. max. unit supplies v dda analog supply voltage 2.4 3.0 3.6 v v ddd digital supply voltage 2.4 3.0 3.6 v i dda analog supply current f s =48khz operating mode ? 10.5 ? ma power-down mode ? 0.5 ? ma i ddd digital supply current f s =48khz operating mode ? 3.5 ? ma power-down mode ? 0.45 ? ma t amb ambient temperature ? 40 ? +85 c analog v i(rms) input voltage (rms value) at 0 db(fs) equivalent ? 1.1 ? v at ? 1 db(fs) signal output ? 1.0 ? v (thd + n)/s total harmonic distortion-plus-noise to signal ratio f s =48khz at ? 1db ?? 88 ? 83 db at ? 60 db; a-weighted ?? 40 ? 34 db f s =96khz at ? 1db ?? 85 ? 80 db at ? 60 db; a-weighted ?? 40 ? 37 db s/n signal-to-noise ratio v i = 0 v; a-weighted f s =48khz ? 100 ? db f s =96khz ? 100 ? db cs channel separation ? 100 ? db
2002 nov 25 4 nxp semico nductors product specification 96 khz sampling 24-bit stereo audio adc uda1361ts block diagram handbook, full pagewidth uda1361ts mgt451 1 v inl adc ? digital interface dc-cancellation filter decimation filter clock control 3 16 v inr adc ? 13 datao 11 bck 12 ws 6 sfor 7 pwon 14 mssel 15 10 v ssd 9 v ddd v ssa 5 v rp 4 v rn 2 v ref 8 sysclk v dda fig.1 block diagram. pinning symbol pin description v inl 1 left channel input v ref 2 reference voltage v inr 3 right channel input v rn 4 negative reference voltage v rp 5 positive reference voltage sfor 6 data format selection input pwon 7 power control input sysclk 8 system clock 256, 384, 512 or 768f s v ddd 9 digital supply voltage v ssd 10 digital ground bck 11 bit clock input/output ws 12 word select input/output datao 13 data output mssel 14 master/slave select v ssa 15 analog ground v dda 16 analog supply voltage handbook, halfpage uda1361ts mgt452 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 v inl v ref v inr v rn v rp sfor pwon sysclk v ddd v ssd bck ws datao mssel v ssa v dda fig.2 pin configuration.
2002 nov 25 5 nxp semico nductors product specification 96 khz sampling 24-bit stereo audio adc uda1361ts functional description system clock the uda1361ts accommodates master and slave modes. the system devices must provide the system clock regardless of master or slave mode. in the master mode a system clock frequency of 256f s is required. in the slave mode a system frequency of 256, 384, 512 or 768f s is automatically detected (for a system clock of 768f s the sampling frequency must be limited to 55 khz). the system clock must be locked in frequency to the digital interface input signals. input level the overall system gain is proportional to v dda , or more accurately the potential diff erence between the reference voltages v vrp and v vrn . the ? 1 db input level at which thd + n/s is specified corresponds to ? 1db(fs) digital output (relative to the full-scale swing). with an input gain switch, the input level can be calculated as follows: at 0 db gain: at 6 db gain: in applications where a 2 v (rms) input signal is used, a 12 k resistor must be connected in series with the input of the adc. this forms a voltage divider together with the internal adc resistor and ensures that only 1 v (rms) maximum is input to the ic. using this application for a 2 v (rms) input signal, the gain switch must be set to 0 db. when a 1 v (rms) input signal is input to the adc in the same application the gain switch must be set to 6 db. an overview of the maximum input voltage allowed against the presence of an external resistor and the setting of the gain switch is given in table 1. the power supply voltage is assumed to be 3 v. table 1 application modes using input gain stage multiple format output interface the serial interface provides the following data output formats in both master and slave modes (see figs 3, 4 and 5): ? i 2 s-bus with data word le ngth of up to 24 bits ? msb-justified serial format with data word length of up to 24 bits. the master mode drives pins ws (word select; 1f s ) and bck (bit clock; 64f s ). ws and bck are received in slave mode. table 2 master/slave select table 3 select data format decimation filter the decimation from 64f s is performed in two stages. the first stage realizes a 4th-order sinx/x characteristic. this filter decreases the sample rate by 8. the second stage, a fir filter, consists of 3 half-band filters, each decimating by a factor of 2. v i 1 db ? () v vrp v vrn ? 3 ---------------------------------- v (rms) == v i 1 db ? () v vrp v vrn ? 23 ---------------------------------- v (rms) == resistor (12 k ) input gain switch maximum input voltage (rms) present 0 db 2 v present 0 db 1 v absent 0 db 1 v absent 6 db 0.5 v mssel master/slave select lslave mode h master mode m (reserved for digital test) sfor data format li 2 s-bus data format h msb-justified data format m (reserved for analog test)
2002 nov 25 6 nxp semico nductors product specification 96 khz sampling 24-bit stereo audio adc uda1361ts table 4 decimation filter characteristic dc cancellation filter a iir high-pass filter is provided to remove unwanted dc components. the filter characteristics are given in table 5. table 5 dc cancellation filter characteristic mute on recovery from power-down, the serial data output datao is held low until valid data is available from the decimation filter. this time tracks with the sampling frequency: , t = 256 ms when f s =48khz. power-down mode/input voltage control the pwon pin can control the power saving together with the optional gain switch for 2 or 1 v (rms) input. the uda1361ts supports 2 v (rms) input using a series resistor of 12 k . for the definition of the pin settings for 1 or 2 v (rms) mode, it is assumed that this resistor is present as a default component. table 6 power-down/input voltage control item condition value (db) pass-band ripple 0 to 0.45f s 0.01 pass-band droop 0.45f s ? 0.2 stop band >0.55 f s ? 70 dynamic range 0 to 0.45 f s >135 item condition value (db) pass-band ripple ? none pass-band gain ? 0 droop at 0.00045f s ? 0.031 attenuation at dc at 0.00000036f s >40 dynamic range 0 to 0.45f s >135 pwon power-down or gain l power-down mode m 0 db gain h 6 db gain t 12288 f s ---------------- = serial interface formats handbook, full pagewidth mgt453 msb-justified format ws left right 3 2 1 3 2 1 msb b2 msb lsb lsb msb b2 b2 8 8 bck data ws left right 3 2 1 3 2 1 msb b2 msb lsb lsb msb b2 8 8 bck data input format i 2 s-bus fig.3 serial interface formats.
2002 nov 25 7 nxp semico nductors product specification 96 khz sampling 24-bit stereo audio adc uda1361ts limiting values in accordance with the absolute maximum rating system (iec 60134). notes 1. all supply connections must be made to the same power supply. 2. esd behaviour is tested in accordance with jedec ii standard: a) human body model (hbm); equivalent to discharging a 100 pf capacitor through a 1.5 k series resistor. b) machine model (mm); equivalent to discharging a 200 pf capacitor through a 0.75 h series inductor. thermal characteristics dc characteristics v ddd =v dda =3v; t amb =25 c; all voltages referenced to ground (pins 10 and 15); unless otherwise specified. symbol parameter condi tions min. max. unit v dd supply voltage note 1 ? 4.0 v t xtal(max) maximum crystal temperature ? 150 c t stg storage temperature ? 65 +125 c t amb ambient temperature ? 40 +85 c v es electrostatic handling voltage hbm; note 2 ? 3000 +3000 v mm; note 2 ? 300 +300 v symbol parameter conditions value unit r th(j-a) thermal resistance from junction to ambient in free air 130 k/w symbol parameter condi tions min. typ. max. unit supplies v dda analog supply voltage note 1 2.4 3.0 3.6 v v ddd digital supply voltage note 1 2.4 3.0 3.6 v i dda analog supply current f s =48khz operating mode ? 10.5 ? ma power-down mode ? 0.5 ? ma f s =96khz operating mode ? 10.5 ? ma power-down mode ? 0.5 ? ma i ddd digital supply current f s =48khz operating mode ? 3.5 ? ma power-down mode ? 0.45 ? ma f s =96khz operating mode ? 7.0 ? ma power-down mode ? 0.65 ? ma
2002 nov 25 8 nxp semico nductors product specification 96 khz sampling 24-bit stereo audio adc uda1361ts note 1. all power supply connections must be connected to the same external power supply unit. digital input pin (sysclk) v ih high-level input voltage 2.0 ? 5.5 v v il low-level input voltage ? 0.5 ? +0.8 v | i li | input leakage current ?? 1 a c i input capacitance ?? 10 pf digital 3-level input pins (pwon, sfor, mssel) v ih high-level input voltage 0.9v dd ? v dd +0.5 v v im middle-level input voltage 0.4v dd ? 0.6v dd v v il low-level input voltage ? 0.5 ? +0.4 v digital input/output pins (bck, ws) v ih high-level input voltage 2.0 ? 5.5 v v il low-level input voltage ? 0.5 ? +0.8 v | i li | input leakage current ?? 1 a c i input capacitance ?? 10 pf v oh high-level output voltage i oh = ? 2 ma 0.85v ddd ?? v v ol low-level output voltage i ol =2ma ?? 0.4 v digital output pin (datao) v oh high-level output voltage i oh = ? 2ma 0.85v ddd ?? v v ol low-level output voltage i ol =2ma ?? 0.4 v analog v ref reference voltage with respect to v ssa 0.45v dda 0.5v dda 0.55v dda v r i input resistance ? 12 ? k c i input capacitance ? 20 ? pf symbol parameter condi tions min. typ. max. unit
2002 nov 25 9 nxp semico nductors product specification 96 khz sampling 24-bit stereo audio adc uda1361ts ac characteristics (analog) v ddd =v dda =3v; f i = 1 khz; t amb =25 c; all voltages referenced to ground (pins 10 and 15); unless otherwise specified. symbol parameter conditions typ. max. unit v i(rms) input voltage (rms value) at 0 db(fs) equivalent 1.1 ? v at ? 1 db(fs) signal output 1.0 ? v ? v i ? unbalance between channels <0.1 0.4 db (thd + n)/s total harmonic distortion-plus-noise to signal ratio f s =48khz at ? 1db ? 88 ? 83 db at ? 60 db; a-weighted ? 40 ? 34 db f s =96khz at ? 1db ? 85 ? 80 db at ? 60 db; a-weighted ? 40 ? 37 db s/n signal-to-noise ratio v i = 0 v; a-weighted f s =48khz 100 ? db f s =96khz 100 ? db cs channel separation 100 ? db psrr power supply rejection ratio f ripple =1khz; v ripple = 30 mv (p-p) 30 ? db
2002 nov 25 10 nxp semico nductors product specification 96 khz sampling 24-bit stereo audio adc uda1361ts ac characteristics (digital) v ddd =v dda = 2.4 to 3.6 v; t amb = ? 40 to +85 c; all voltages referenced to ground (pins 10 and 15); unless otherwise specified. symbol parameter conditions min. typ. max. unit system clock timing t sys system clock cycle f sys = 256f s 35 88 780 ns f sys = 384f s 23 59 520 ns f sys = 512f s 17 44 390 ns f sys = 768f s 17 30 260 ns t cwl low-level system clock pulse width 0.40t sys ? 0.60t sys ns t cwh high-level system clock pulse width 0.40t sys ? 0.60t sys ns serial data timing; see figs 4 and 5 t cy(clk)(bit) bit clock period ; master mode 64f s 64f s 64f s hz ; slave mode ?? 64f s hz t bckh bit clock high time 50 ?? ns t bckl bit clock low time 50 ?? ns t r rise time ?? 20 ns t f fall time ?? 20 ns t d(o)(d)(bck) data output delay time (from bck fa lling edge) ?? 40 ns t d(o)(d)(ws) data output delay time (from ws edge) msb-justified format ?? 40 ns t h(o)(d) data output hold time 0 ?? ns t r(ws) word select rise time ?? 20 ns t f(ws) word select fall time ?? 20 ns f ws word select period 111f s t d(ws)(bck) word select delay from bck master mode ? 40 ? +40 ns t su(ws) word select set-up time slave mode 20 ?? ns t h(ws) word select hold time slave mode 10 ?? ns f cy 1 t cy ------- - = f cy 1 t cy ------- - =
2002 nov 25 11 nxp semico nductors product specification 96 khz sampling 24-bit stereo audio adc uda1361ts handbook, full pagewidth mgt454 t d(o)(d)(bck) t d(ws)(bck) t cy(clk)(bit) ws bck datao t h(o)(d) t f t bckh t bckl t r fig.4 serial interface master mode timing. handbook, full pagewidth mgt455 t h(ws) t su(ws) t d(o)(d)(bck) t d(o)(d)(ws) t h(o)(d) t bckl t cy(clk)(bit) ws bck datao t f t bckh t r fig.5 serial interface slave mode timing.
2002 nov 25 12 nxp semico nductors product specification 96 khz sampling 24-bit stereo audio adc uda1361ts application information the application information illustra ted in fig.6, is an optimum application envi ronment. simplification is possible at the cost of some performance degradation. handbook, full pagewidth v ddd x4-1 5 6 4 3 2 116 15 14 13 12 11 10 9 mgu297 x5 x6 7 uda1361ts r12 47 k 1 nf (63 v) c11 47 f (16 v) r13 47 k x4-2 x4-3 v ddd x2-1 r4 47 k r5 47 k x2-2 x2-3 v ddd v ddd v ddd v dda x3-1 r7 47 k r6 47 k x3-2 x1-1 x1-4 x1-2 x1-3 x1-5 x1-6 x1-7 x1-9 x1-10 x1-8 x3-3 v dda v dda 8 vd r10 47 sysclk r11 47 l1 blm32a07 l2 blm32a07 1 nf (63 v) 47 f (16 v) c3 47 f (16 v) c4 47 f (16 v) c1 100 f (16 v) c2 100 f (16 v) c5 47 f (16 v) c8 100 nf (63 v) c9 100 nf (63 v) c6 47 f (16 v) c10 100 nf (63 v) c7 100 nf (63 v) c12 r1 220 r3 1 r2 1 fig.6 application diagram. the value of capa citors c11 and c12 can be reduced. note that changing their value will change th e cut-off frequ ency determined by the capacitor value and the12 k input resistance of the adc.
2002 nov 25 13 nxp semico nductors product specification 96 khz sampling 24-bit stereo audio adc uda1361ts package outline unit a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v references outline version european projection issue date iec jedec jeita mm 0.15 0.00 1.4 1.2 0.32 0.20 0.25 0.13 5.3 5.1 4.5 4.3 0.65 6.6 6.2 0.65 0.45 0.48 0.18 10 0 o o 0.13 0.2 0.1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.2 mm maximum per side are not included. 0.75 0.45 1 sot369-1 mo-152 99-12-27 03-02-19 w m a a 1 a 2 b p d y h e l p q detail x e z e c l v m a x (a ) 3 a 0.25 18 16 9 pin 1 index 0 2.5 5 mm scale s sop16: plastic shrink small outline package; 16 leads; body width 4.4 mm sot369 -1 a max. 1.5
2002 nov 25 14 nxp semico nductors product specification 96 khz sampling 24-bit stereo audio adc uda1361ts soldering introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our ?data handbook ic26; integrated circuit packages? (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering ca n still be used for certain surface mount ics, but it is not suitable for fine pitch smds. in these situations reflow soldering is recommended. reflow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215to250 c. the top-surface temperature of the packages should preferable be kept below 220 c for thick/large packages, and below 235 c for small/thin packages. wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specif ically developed. if wave soldering is used the following conditions must be observed for optimal results: ? use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. ? for packages with leads on two sides and a pitch (e): ? larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; ? smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. ? for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will elim inate the need for removal of corrosive residues in most applications. manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limit ed to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
2002 nov 25 15 nxp semico nductors product specification 96 khz sampling 24-bit stereo audio adc uda1361ts suitability of surface mount ic packages for wave and reflow soldering methods notes 1. for more detailed information on the bga packages refer to the ?(lf)bga application note ? (an01026); order a copy from your nxp semicond uctors sales office. 2. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the ?data handbook ic26; integrated circuit packages; section: packing methods? . 3. these packages are not suitable for wave soldering. on versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. on versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 4. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 5. wave soldering is suitable for lqfp, tqfp and qfp packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 6. wave soldering is suitable for ssop and tssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. package (1) soldering method wave reflow (2) bga, lbga, lfbga, sqfp, tfbga, vfbga not suitable suitable hbcc, hbga, hlqfp, hsqfp, hsop, htqfp, htssop, hvqfn, hvson, sms not suitable (3) suitable plcc (4) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (4)(5) suitable ssop, tssop, vso not recommended (6) suitable
2002 nov 25 16 nxp semico nductors product specification 96 khz sampling 24-bit stereo audio adc uda1361ts data sheet status notes 1. please consult the most recently issued document before initiating or completing a design. 2. the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. the latest pr oduct status information is available on the internet at url http://www.nxp.com. document status (1) product status (2) definition objective data sheet development this document contains data from the objective specification for product development. preliminary data sheet qualification this document contains data from the preliminary specification. product data sheet production this document contains the product specification. disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. in no event shall nxp semico nductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without lim itation - lost profits, lost savings, business interrup tion, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semi conductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use ? nxp semiconductors products are not designed, authorized or warranted to be suitable for use in life support, lif e-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for incl usion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are fo r illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assi stance with ap plications or customer product design. it is customer?s sole responsibility to dete rmine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as for the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applications and products using nxp semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect.
2002 nov 25 17 nxp semico nductors product specification 96 khz sampling 24-bit stereo audio adc uda1361ts limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will c ause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeat ed exposure to lim iting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the general terms and conditions of comme rcial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconductors products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. export control ? this document as well as the item(s) described herein may be subject to export control regulations. export might require a prior authorization from national authorities. quick reference data ? the quick refere nce data is an extract of the product data given in the limiting values and characteristics sections of this document, and as such is not complete, exhaustive or legally binding. non-automotive qualified products ? unless this data sheet expressly states that this specific nxp semiconductors product is automotive qualified, the product is not suitable for automotive use. it is neither qualified nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. in the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without nxp semicond uctors? warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors? specifications such use shall be solely at customer?s own risk, and (c) customer fully indemnifies nxp semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond nxp semiconductors? standard warranty and nxp semiconductors? product specifications.
nxp semiconductors provides high performance mixed signal and standard product solutions that leverage its leadi ng rf, analog, power management, interface, security and digital processing expertise contact information for additional information please visit: http://www.nxp.com for sales offices addresses send e-mail to: salesaddresses@nxp.com ? nxp b.v. 2010 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reli able and may be changed without notice. no liabilit y will be accepted by the publisher for any consequen ce of its use. publicat ion thereof d oes not con vey nor imply any license under patent- or other industrial or intellectual property rights. customer notification this data sheet was changed to reflect the new company name nxp semiconductors, including new legal definitions and disclaimers. no changes were made to the technical content, except for package outline drawings which were updated to the latest version. printed in the netherlands 753503/02/pp 18 date of release: 2002 nov 25 document order number: 9397 750 10479

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